PIC18LF6410T-I/PT【PDF 10/411 页】IC PIC MCU FLASH 8KX16 64TQFP

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2010-2012 Microchip Technology Inc.

DS39977F-page 107

PIC18F66K80 FAMILY

6.2.3

INSTRUCTIONS IN PROGRAM

MEMORY

The program memory is addressed in bytes. Instruc-

tions are stored as two or four bytes in program

memory. The Least Significant Byte (LSB) of an

instruction word is always stored in a program memory

location with an even address (LSB = 0). To maintain

alignment with instruction boundaries, the PC incre-

ments in steps of two and the LSB will always read ‘0’

(see Section 6.1.2 “Program Counter”).

Figure 6-5 shows an example of how instruction words

are stored in the program memory.

The CALL and GOTO instructions have the absolute

program memory address embedded into the instruc-

tion. Since instructions are always stored on word

boundaries, the data contained in the instruction is a

word address. The word address is written to PC<20:1>

which accesses the desired byte address in program

memory. Instruction #2 in Figure 6-5 shows how the

instruction, GOTO 0006h, is encoded in the program

memory. Program branch instructions, which encode a

relative address offset, operate in the same manner. The

offset value stored in a branch instruction represents the

number of single-word instructions that the PC will be

offset by. For more details on the instruction set, see

Section 29.0 “Instruction Set Summary”

FIGURE 6-5:

INSTRUCTIONS IN PROGRAM MEMORY

6.2.4

TWO-WORD INSTRUCTIONS

The standard PIC18 instruction set has four, two-word

instructions: CALL, MOVFF, GOTO and LSFR. In all cases,

the second word of the instructions always has ‘1111’ as

its four Most Significant bits (MSbs). The other 12 bits

are literal data, usually a data memory address.

The use of ‘1111’ in the 4 MSbs of an instruction

specifies a special form of NOP. If the instruction is

executed in proper sequence, immediately after the

first word, the data in the second word is accessed and

used by the instruction sequence. If the first word is

skipped for some reason and the second word is

executed by itself, a NOP is executed instead. This is

necessary for cases when the two-word instruction is

preceded by a conditional instruction that changes the

PC. Example 6-4 shows how this works.

EXAMPLE 6-4:

TWO-WORD INSTRUCTIONS

Word Address

LSB = 1

LSB = 0

Program Memory

Byte Locations

000000h

000002h

000004h

000006h

Instruction 1:

MOVLW

055h

0Fh

55h

000008h

Instruction 2:

GOTO

0006h

EFh

03h

00000Ah

F0h

00h

00000Ch

Instruction 3:

MOVFF

123h, 456h

C1h

23h

00000Eh

F4h

56h

000010h

000012h

000014h

Note:

For information on two-word instructions

in the extended instruction set, see

Section 6.5 “Program Memory and the

Extended Instruction Set”

CASE 1:

Object Code

Source Code

0110 0110 0000 0000

TSTFSZ

REG1

; is RAM location 0?

1100 0001 0010 0011

MOVFF

REG1, REG2

; No, skip this word

1111 0100 0101 0110

; Execute this word as a NOP

0010 0100 0000 0000

ADDWF

REG3

; continue code

CASE 2:

Object Code

Source Code

0110 0110 0000 0000

TSTFSZ

REG1

; is RAM location 0?

1100 0001 0010 0011

MOVFF

REG1, REG2

; Yes, execute this word

1111 0100 0101 0110

; 2nd word of instruction

0010 0100 0000 0000

ADDWF

REG3

; continue code

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